Job Description and Requirements
The Synopsys Embedded Memory and Logic Team is responsible for standard and custom embedded SRAMs/ROMs development and provides both functional and physical views of memory in form of memory compilers, that is a highly important semiconductor intellectual property (IP) for the design of complex integrated circuits. Our design team is completely responsible for all aspects of memory development starting from Bit Cell Analysis, Architecture Design, Characterization and Verification and we hope you will share your resume of interest with us as we are growing our team.
In this role, the Senior Engineer will be part of team contributing to different types of architectures of embedded SRAM, register files and ROM.
As a Senior Engineer, the individual will be involved in challenging projects and drive it to completion in record time. You will quickly ramp on the existing flow, understand the challenges, and produce the work plan.
Your expertise in deep submicron technology and Finfet, SRAM design, processor design, Digital design flow and teamwork skills will be highly leveraged to guide activity across the entire cross-discipline, multi-site team.
You will work with others to identify the issues, get buy-in on proposed solutions, and implement the solutions in time for the team to execute to schedule.
Skills/Experience:
- BE/B.Tech/ME/M.Tech/MS in Electrical Engineering with minimum of 5 years of experience in VLSI Design
- Deep understanding of SRAM/Register File architectures and advanced custom circuit implementations.
- Exposure to full embedded memory design flow: Architecture, circuit design, physical implementation, compiler automation, characterization, timing and model generation.
- Direct experience with the most advanced technology nodes. Familiarity with variation-aware design in nanometer technology nodes
- Hands on experience on scripting using Perl, python for automation
- Deep understanding of SRAM single port and multi-port design
Responsibilities: (and learning opportunities)
- Develop Multiport SRAM/Register file architectures and circuit implementation techniques.
- Schematic entry, simulation of major blocks, layout planning, layout supervision and interface with CAD team for full verification and model generation.
- Designing and implementing optimum low-power and area-efficient embedded memory (SRAM, register files, etc.) circuits and architectures.
- Learn and apply skills in memory compilers having Transistor level circuit Design.
- Resolves a wide range of issues in creative ways
- Inter-team interaction with customer focused
- Frequently networks with senior internal and external personnel in own area of expertise
- Experience of FinFet Technology for Memory Design
- With minimal supervision, prioritizes workload to successfully manage multiple tasks and responsibilities
The base salary range across the U.S. for this role is between $97,000 to $169,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
Synopsys
March 12, 2023